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Texas Instruments SN74LS112AN의 평가 키트와 참조 설계를 확인하세요.
평가 키트
관련 부품
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설명
유통업체에서 제공한 Texas Instruments SN74LS112AN에 대한 설명입니다.
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
Flip-Flop; TTL; 16-Lead PDIP; 7 V; 0.1 mA; 2 V; 0.8 V; 3.4 V (Typ.)
Ic, Flip-Flop, 2 Circuits; Logic Family / Base Number:74Ls112; Flip-Flop Type:jk
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP16
IC, FLIP-FLOP, 2 CIRCUITS; Logic Family / Base Number: 74LS112; Flip-Flop Type: JK; Propagation Delay: 15ns; Frequency: 30MHz; Output Current: 8mA; Logic Case Style: DIP; No. of Pins: 16Pins; Trigger Type: Negative Edge; IC Outp
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기술 사양
Physical
Case/PackagePDIP
MountThrough Hole
Number of Pins16
Weight951.693491 mg
Technical
Clock Edge Trigger TypeNegative Edge
High Level Output Current-400 µA
Logic FunctionAND, Flip-Flop, JK-Type
Low Level Output Current8 mA
Max Frequency45 MHz
Max Operating Temperature70 °C
Max Supply Voltage5.25 V
Min Operating Temperature0 °C
Min Supply Voltage4.75 V
Nominal Supply Current100 µA
Number of Bits2
Number of Bits per Element1
Number of Channels2
Number of Circuits2
Number of Elements2
Number of Input Lines5
Number of Output Lines2
Operating Supply Current100 µA
Operating Supply Voltage5 V
Output Current8 mA
Output TypeTTL
PolarityNon-Inverting
Propagation Delay20 ns
Schedule B8542390000
Turn-On Delay Time15 ns
Dimensions
Height5.08 mm
Length19.3 mm
Thickness3.9 mm
Width6.35 mm