these hex buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers clock drivers and bus-oriented receivers and transmitters. the hc367 devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1oe\ and 2oe\) inputs. when oe\ is low the device passes noninverted data from the a inputs to the y outputs. when oe\ is high the outputs are in the high-impedance state.