Texas Instruments SN54LS273

these monolithic positive-edge-triggered flip-flops utilize ttl circuitry to implement d-type flip-flop logic with a direct clear input. information at the d inputs meeting the setup time requirements is transferred to the q outputs on the positive-going edge of the clock pulse. clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. when the clock input is at either the high or low level the d input signal has no effect at the output. these flip-flops are guaranteed to respond to clock frequencies ranging form 0 to 30 megahertz while maximum clock frequency is typically 40 megahertz. typical power dissipation is 39 milliwatts per flip-flop for the 273 and 10 milliwatts for the ls273. view all in datasheet