공급망
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date1991-11-01
Lifecycle StatusObsolete (Last Updated: 4 months ago)
LTB Date2017-06-01
LTD Date2017-12-01
관련 부품
Lattice SemiconductorISPLSI 2128VE-135LB100
Complex Programmable Logic Devices - CPLDs PROGRAMMABLE SUPER FAST HI DENSITY PLD
Lattice SemiconductorM4A3-128/64-10YC
CPLD ispMACH 4A Family 5K Gates 128 Macro Cells 83.3MHz/118MHz 3.3V 100-Pin PQFP Tray
Lattice SemiconductorM4A3-128/64-7YC
CPLD ispMACH 4A Family 5K Gates 128 Macro Cells 105MHz/125MHz 3.3V 100-Pin PQFP Tray
MicrochipATF1508AS-10QU100
CPLD ATF1500 Family 3K Gates 128 Macro Cells 100MHz 5V 100-Pin PQFP Tray
설명
유통업체에서 제공한 Intel / Altera EPM7064QC100-10에 대한 설명입니다.
CPLD MAX 7000 Family 1.25K Gates 64 Macro Cells 100MHz CMOS Technology 5V 100-Pin PQFP
EE PLD, 10ns, 64-Cell, CMOS, PQFP100
MAX7000 CPLD 64 Macrocells <NV
제조업체 별칭
Intel / Altera에는 유통업체가 대체하여 사용할 수 있는 전 세계 여러 브랜드가 있습니다. Intel / Altera는 다음 이름으로도 알려져 있습니다:
- Altera (Intel)
- Altera (Intel Programmable Solutions Group)
- Intel FPGAs/Altera
- ALTERA CORP
- Intel Corporation
- IntelProgrammable Solutions Group
- Intel / Alte
- INTEL CORP
- ALTERA CORPORATION
- ALTERAINERNATIONALLIMITED
기술 사양
Physical
Case/PackageQFP
MountSurface Mount
Number of Pins100
Number of Terminals100
Technical
Frequency125 MHz
Max Frequency125 MHz
Max Operating Temperature70 °C
Max Supply Voltage5.25 V
Memory TypeEEPROM
Min Operating Temperature0 °C
Min Supply Voltage4.75 V
Number of Gates1250
Number of I/Os68
Number of Inputs68
Number of Logic Blocks (LABs)4
Number of Logic Elements/Cells4
Number of Macrocells64
Number of Outputs68
Number of Programmable I/O68
Operating Supply Voltage5 V
Propagation Delay10 ns
Schedule B8542390000
Speed Grade10
Temperature GradeCommercial
Turn-On Delay Time10 ns
Dimensions
Height - Seated (Max)3.65 mm
Length20 mm
Terminal Pitch650 µm
Width14 mm