Renesas ISL89163FBEBZ

IC GATE DRVR LOW-SIDE 8SOIC / Low-Side Gate Driver IC Non-Inverting 8-SOIC-EP
$ 2.501
Obsolete

価格と在庫

ドキュメント

Renesas ISL89163FBEBZのデータシートとメーカー資料をダウンロードする。

IHS

Datasheet22ページ7年前
Datasheet15ページ15年前

Integrated Device Technology

Future Electronics

Intersil

TME

CADモデル

モデル情報
提供:Renesas
リリース日Aug 13, 2025
IPC準拠IPC-7351B
スタイルガイドの改訂バージョン 1.0 - Nov 1, 2024
データシートソースバージョン 6.00 - Jul 9, 2019
検証

在庫履歴

3か月間の傾向:
+12.69%

サプライチェーン

Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8540000000
Introduction Date2017-10-24
Lifecycle StatusObsolete (Last Updated: 2 months ago)
LTB Date2025-12-06
LTD Date2026-06-06
Manufacturer Lifecycle StatusOBSOLETE (Last Updated: 2 months ago)

関連部品

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ROHS3Compliant Obsolete Matte Tin (Sn) e3 IC Gate Driver 1.85V 3.15V 6A 6A -40C~125C TJ 20ns 20ns
ISL89165 Series Dual Ch 6 A 2 Ohm 0 to 16 Vout Power MOSFET Driver - SOIC-8
TTL input, dual non-inverting output, peak 5A sink, 5A source current Low-Side Gate Driver
CMOS input, dual non-inverting output, peak 5A sink, 5A source current Low-Side Gate Driver
FAN3225 Series Dual 18 V 4 A High Speed Low Side Gate Driver - SOIC-8

説明

Renesas ISL89163FBEBZの詳細は販売業者から提供されます。

IC GATE DRVR LOW-SIDE 8SOIC / Low-Side Gate Driver IC Non-Inverting 8-SOIC-EP
ISL89163 Series Dual Ch 6 A 2 Ohm 4.5 to 16 Vout Power MOSFET Driver - SOIC-8
GULL WING RoHS Compliant Active Matte Tin (Sn) - annealed IC Gate Driver 3.9mm 16V 33.3W 6A
High Speed, Dual Channel, 6A, Power MOSFET Driver with Enable Inputs
The ISL89163, ISL89164, and ISL89165 are high-speed, 6A, dual channel MOSFET drivers with enable inputs. Precision thresholds on all logic inputs allow the use of external RC circuits to generate accurate and stable time delays on both the main channel inputs, INA and INB, and the enable inputs, ENA and ENB. The precision delays capable of these precise logic thresholds makes these parts very useful for dead-time control and synchronous rectifiers. Note that the enable and input logic inputs can be interchanged for alternate logic implementations. Three input logic thresholds are available: 3. 3V (CMOS), 5. 0V (CMOS or TTL compatible), and CMOS thresholds that are proportional to VDD. At high switching frequencies, these MOSFET drivers use very little internal bias currents. Separate, non-overlapping drive circuits are used to drive each CMOS output FET to prevent shoot-through currents in the output stage. The start-up sequence is designed to prevent unexpected glitches when VDD is being turned on or turned off. When VDD < ~1V, an internal 10kΩ resistor between the output and ground helps to keep the output voltage low. When ~1V < VDD < UV, both outputs are driven low with very low resistance and the logic inputs are ignored. This insures that the driven FETs are off. When VDD > UVLO, and after a short delay, the outputs now respond to the logic inputs.

メーカーの別名

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