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3.3 V 100/133 MHz Differential 1: 19 HCSL Clock ZDB/Fanout Buffer for PCIe

Clock / Data Fanout Buffer, 1: 8 Differential, with CML Outputs

Clock Generator with Dual PLLs | IC CLK GEN PLL DUAL 40LFCSP

Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer

IC CLK BUFFER 1: 2 7.5GHZ 16LFCSP / Clock Buffer/Driver, Data IC 1: 2 7.5 GHz 16-VFQFN Exposed Pad, CSP

IC CLK BUFFER 1: 1 7.5GHZ 16LFCSP / Clock Buffer/Driver, Data IC 1: 1 7.5 GHz 16-VFQFN Exposed Pad, CSP

Ultrafast, SiGe, Open-Collector HVDS Clock/Data Buffer

Clock / Data Fanout Buffer, 1: 2 Differential, ECL, 3.3 V / 5.0 V

MC100EP139 Series 1 GHz 5.5 V ECL ÷2/4, ÷4/5/6 Clock Generation Chip - TSSOP-20

Low Skew Clock Driver, S Series, 1 True Output(s), 1 Inverted Output(s), PDSO24