Avnet SilicaのCPLD - コンプレックス・プログラミング・ロジック・デバイスを探索
結果: 91
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SPLD PAL Family 800 Gates 10 Macro Cells 142MHz 5V 24-Pin CDIP
| Distributor | SKU | Min | Pkg | Bulk Pricing | Updated | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| SHENGYU ELECTRONICS | 5962-8984106LA | 14,104 | 1 | USD | 1d | ||||||||
| Anlinkda | 5962-8984106LA | 221 | USD | 2h |
Mixed Signal Matrix 25MHz 1.8V/3.3V/5V 20-Pin STQFN T/R
Programmable Mixed Signal Matrix with Asynchronous State Machine 1.8V to 5V 22-Pin MSTQFN T/R
Programmable Mixed Signal Array 1.8V to 5V 20-Pin STQFN T/R
CPLD ispLSI® 1000 Family 6K Gates 128 Macro Cells 60MHz 5V 84-Pin CPGA
| Distributor | SKU | Min | Pkg | Bulk Pricing | Updated | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| SHENGYU ELECTRONICS | 5962-9308501MXC | 4,144 | 1 | USD | 1d |
OT PLD, 12-Cell, PLA-Type
Prog Mixed Signal Matrix W/isp, Stqfn-20 Rohs Compliant: Yes
Programmable Mixed Signal Array 1.8V to 5V 20-Pin STQFN T/R
Microcircuit, Memory, Digital, Cmos, Uv Eraseable Programmable Logic Array, Monolithic Silicon
Prog Mixed-Signal Matrix, Stqfn-20 Rohs Compliant: Yes