onsemi MC10E131FNG

MC10E131 Series 5 V 1.4 GHz Differential ECL 4-Bit D-Type Flip-Flop - PLCC-28

Flip Flop D-Primary-Secondary Type Pos-Edge 1-Element 28-Pin PLCC Rail

D-TYPE FLIP FLOP QUAD, 500PS PLCC-28; Logic Family / Base Number:-; Flip-Flop Type:D; Propagation Delay:500ps; Frequency:1.4GHz; Output Current:50mA; IC Case / Package:LCC; No. of Pins:28Pins; Trigger Type:Positive Edge; MSL:- RoHS Compliant: Yes

The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (CC) LOW and using the Clock Enable (CEbar) inputs for clocking. Common clocking is achieved by holding the CEbar inputs LOW and using CC to clock all four flip-flops. In this case the CEbar inputs perform the function of controlling the common clock to each flip-flop. Individual asynchronous resets are provided (R). Asynchronous set controls (S) are ganged together in pairs with the pairing chosen to reflect physical chip symmetry. Data enters the master when both CC and CEbar are LOW and transfers to the slave when either CC or CEbar (or both) go HIGH. The 100 Series contains temperature compensation.