Texas Instruments SN74LS90

each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the 90a and ls90 divide-by-six for the 92a and ls92 and the divide-by eight for the 93a and ls93. all of these counters have a gated zero reset and the 90a and ls90 also have gated set-to-nine inputs for use in bcd nine s complement applications. to use their maximum count length (decade divide-by-twelve or four-bit binary) of these counters the ckb input is connected to the qa output. the input count pulses are applied to cka input and the outputs are as described in the appropriate function table. view all in datasheet