onsemi 74VCX163245MTD..

Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs

Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48

Bus Transceiver Dual 16 Channel 3 State 48-Pin TSSOP W Rail

Voltage Level Translator 48-Pin TSSOP W Rail

Bidirectional ROHS3Compliant Surface Mount Voltage Level Voltage Level Translator -40C~85C TA 2.7V~3.6V

TRANSCEIVER, 16BIT, TRI-STATE, TSSOP-48

IC TRNSLTR BIDIRECTIONAL 48TSSOP

IC TRANSCVR 16BIT N-INV 48TSSOP

BUS TRANSCEIVER, ALVC/VCX/A SERI

Translating Transceiver, Tssop-48; Logic Device Type:Transceiver, Translating; Logic Case Style:Tssop; No. Of Pins:48Pins; Supply Voltage Min:1.65V; Supply Voltage Max:2.7V; Logic Ic Family:74Vcx; Logic Ic Base Number:7416245 Rohs Compliant: Yes |Onsemi 74VCX163245MTD

The VCX163245 is a dual supply, 16-bit translating transceiver that is designed for 2 way asynchronous communication between busses at different supply voltages by providing true signal translation. The supply rails consist of VCCA, which is a higher potential rail operating at 2.3V to 3.6V and VCCB, which is the lower potential rail operating at 1.65V to 2.7V. (VCCB must be less than or equal to VCCA for proper device operation). This dual supply design allows for translation from 1.8V to 2.5V busses to busses at a higher potential, up to 3.3V. The Transmit/Receive (T/R#) input determines the direction of data flow. Transmit (active-HIGH) enables data from A Ports to B Ports; Receive (active-LOW) enables data from B Ports to A Ports. The Output Enable (OE#) input, when HIGH, disables both A and B Ports by placing them in a High-Z condition. The A Port interfaces with the higher voltage bus (2.7V to 3.3V); The B Port interfaces with the lower voltage bus (1.8V to 2.5V). Also the VCX163245 is designed so that the control pins (T/R#n, OE#n) are supplied by VCCB. The 74VCX163245 is suitable for mixed voltage applications such as notebook computers using a 1.8V CPU and 3.3V peripheral components. It is fabricated with an Advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.