onsemi 74LCX16373MEAX

Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs
$ 1.35
Obsolete
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onsemi

Future Electronics

Fairchild Semiconductor

SHENGYU ELECTRONICS

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Chaîne d'approvisionnement

Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8542.39.00.01
Introduction Date1994-01-01
Lifecycle StatusObsolete (Last Updated: 4 months ago)
LTB Date2010-09-23
LTD Date2011-03-23

Pièces détachées

Texas InstrumentsSN74ALVCH162374DL
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 48-SSOP -40 to 85
Texas InstrumentsSN74ALVCH162374DLR
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 48-SSOP -40 to 85
D-Type Transparent Latch Channel 8:8 IC Tri-State 48-SSOP
Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs and 26 Ohm Series Resistor
Texas InstrumentsSN74ALVTH16373DL
5mA 1ns 2 2.3V 3.6V 8mA D-Type Transparent Latch ALVT 2 8mA SSOP-48 15.88mm*7.49mm*2.59mm
Latch, 74LVT16373, D Type Transparent, Tri State, 3.9 ns, 64 mA, 48 Pins, SSOP

Descriptions

Descriptions de onsemi 74LCX16373MEAX fournies par ses distributeurs.

Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs
Latch Transparent 3-ST 16-CH D-Type 48-Pin SSOP T/R
Bus Driver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48
Surface Mount RoHS Compliant Obsolete Lead Free D-Type Transparent Latch -40C~85C 5.4ns 24mA 24mA
IC LATCH TRANSP 16BIT LV 48SSOP
The LCX16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the outputs are in a high impedance state. The LCX16373 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX16373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

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