Texas Instruments SN74LVCZ240AN

Buffer/Line Driver 8-CH Inverting 3-ST CMOS 20-Pin PDIP Tube

ROHS3Compliant DUAL CMOS ENABLE LOW Logic Buffer, Inverting -40C~85C TA 3.3V 9ns 24mA 24mA

IC BUFFER INVERT 3.6V 20DIP / Buffer, Inverting 2 Element 4 Bit per Element 3-State Output 20-PDIP

This octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation. The SN74LVCZ240A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device is organized as two 4-bit buffers/drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.