onsemi 74LVTH573MTCX

Latch, 74LVTH573, D Type Transparent, Tri State, 4.1 ns, 64 mA, 20 Pins, TSSOP
$ 1
EOL
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Datasheet11 SeitenVor 21 Jahren

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Fairchild Semiconductor

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Alternative Teile

Price @ 1000
$ 1
$ 0.509
$ 0.509
Stock
328,263
438,628
438,628
Authorized Distributors
5
3
3
Case/Package
TSSOP
TSSOP
TSSOP
Number of Pins
20
20
20
Logic Function
D-Type, Latch
D-Type, Latch
D-Type, Latch
Number of Elements
1
1
1
Number of Bits per Element
-
-
-
Propagation Delay
4.4 ns
5.9 ns
5.9 ns
Frequency
-
-
-
Clock Edge Trigger Type
-
-
-
Min Supply Voltage
2.7 V
2.7 V
2.7 V
Max Supply Voltage
3.6 V
3.6 V
3.6 V
Quiescent Current
-
5 mA
5 mA

Lieferkette

Country of OriginPhilippines
Harmonized Tariff Schedule (HTS) Code8542.39.00.60
Introduction Date1996-11-01
Lifecycle StatusEOL (Last Updated: 6 days ago)
LTB Date2024-06-30
LTD Date2024-12-31
Manufacturer Lifecycle StatusLAST SHIPMENTS (Last Updated: 6 days ago)

Verwandte Teile

4.4ns 1 2.7V 3.6V 64mA D-Type Transparent Latch LVT 1 32mA TSSOP-20 6.5mm*4.4mm*900¦Ìm
4.4ns(Max) 1 2.7V 3.6V 64mA D-Type Transparent Latch LVT 1 32mA TSSOP-20 , 6.5mm*4.4mm*900¦Ìm
NXP Semiconductors74LVT574PW,118
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP T/R
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP W T/R
Texas InstrumentsSN74LVTH373PWR
5mA 2.7ns 1 2.7V 3.6V 64mA D-Type Transparent Latch LVT 1 32mA TSSOP-20 , 6.5mm*4.4mm*1.15mm
Texas InstrumentsSN74LVTH574PWR
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP T/R

Beschreibungen

Beschreibungen von onsemi 74LVTH573MTCX, die von den Distributoren bereitgestellt werden.

Latch, 74LVTH573, D Type Transparent, Tri State, 4.1 ns, 64 mA, 20 Pins, TSSOP
Low Voltage Octal Transparent Latch with 3-STATE Outputs
74LVTH573 Tape & Reel (TR) LVT 74LVTH latch circuit 4.4ns 32mA 64mA 6.6ns 191mg
D-Typelocking Latch 2.7V~3.6V 4.4ns TSSOP-20 Latches ROHS
The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the bus output is in the high impedance state. The LVTH573 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These octal latches are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT573 and LVTH573 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.

Aliasnamen des Herstellers

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  • ON SEMICONDUCTORS
  • ONSEMIC
  • ON Semicondu
  • OSC
  • ONSE
  • ON SEMICOND
  • ON Semiconductor / Fairchild
  • SCG
  • ON Semiconductor Cor
  • ON SEMICO
  • ONSM
  • ON SEMICONDUCTOR CORP
  • onsemi / Fairchild
  • MOT/ON SEMI
  • Fairchild/ONSemiconductor
  • ON Semiconductor Corporation
  • ON4
  • ON Semi - ON Semiconductor
  • ON SEMICONDUCT
  • ON-SEMI SCG
  • ON Semiconductor Inc.
  • onsemiconductor
  • On Semiconductor Ltd