onsemi 74LVT373MTCX

Latch, 74LVT373, D Type Transparent, Tri State, 4.5 ns, 64 mA, 20 Pins, TSSOP
$ 1.036
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Datasheet10 SeitenVor 27 Jahren

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Alternative Teile

Price @ 1000
$ 1.036
$ 0.345
$ 0.345
Stock
562,326
368,175
368,175
Authorized Distributors
3
5
5
Case/Package
TSSOP
TSSOP
TSSOP
Number of Pins
20
20
20
Logic Function
D-Type, Latch
D-Type, Latch
D-Type, Latch
Number of Elements
1
1
1
Number of Bits per Element
-
-
-
Propagation Delay
4.5 ns
5.9 ns
5.9 ns
Frequency
-
-
-
Clock Edge Trigger Type
-
-
-
Min Supply Voltage
2.7 V
2.7 V
2.7 V
Max Supply Voltage
3.6 V
3.6 V
3.6 V
Quiescent Current
-
-
-

Lieferkette

Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8542.39.00.01
Introduction Date1994-01-01
Lifecycle StatusEOL (Last Updated: 6 days ago)
Manufacturer Lifecycle StatusLAST SHIPMENTS (Last Updated: 6 days ago)

Verwandte Teile

Texas InstrumentsSN74LVTH373PWR
5mA 2.7ns 1 2.7V 3.6V 64mA D-Type Transparent Latch LVT 1 32mA TSSOP-20 , 6.5mm*4.4mm*1.15mm
Texas InstrumentsSN74LVTH574PWR
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP T/R
1.5ns 1 2.7V 3.6V 64mA D-Type Transparent Latch LVT 1 32mA TSSOP-20 6.5mm*4.4mm*900¦Ìm
Latch, 74LVTH373, D Type Transparent, Tri State, 4.5 ns, 64 mA, 20 Pins, TSSOP
Texas InstrumentsSN74LVTH574PW
3.3-V ABT Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85
4.4ns 1 2.7V 3.6V 64mA D-Type Transparent Latch LVT 1 32mA TSSOP-20 6.5mm*4.4mm*900¦Ìm

Beschreibungen

Beschreibungen von onsemi 74LVT373MTCX, die von den Distributoren bereitgestellt werden.

Latch, 74LVT373, D Type Transparent, Tri State, 4.5 ns, 64 mA, 20 Pins, TSSOP
74LVT Series 3.6 V 3-State Surface Mount Octal Latch - TSSOP-20
74LVT373 Tape & Reel (TR) LVT 74LVT latch circuit 4.5ns 32mA 64mA 5.9ns 191mg
Low Voltage Octal Transparent Latch with 3-STATE Outputs
The LVT373 and LVTH373 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data satisfying the input timing requirements is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the bus output is in a high impedance state. The LVTH373 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These octal latches are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT373 and LVTH373 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.

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