onsemi 74LCX112SJ

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
$ 0.23
Obsolete
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onsemi

Fairchild Semiconductor

Augswan

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Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8542.39.00.01
Introduction Date1996-01-01
Lifecycle StatusObsolete (Last Updated: 4 months ago)

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Beschreibungen

Beschreibungen von onsemi 74LCX112SJ, die von den Distributoren bereitgestellt werden.

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
Tube e3 74LCX MATTE TIN flip flop 5.3mm 2V 7.5ns @ 3.3V 50pF 150MHz
J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
IC FF JK TYPE DOUBLE 1BIT 16SOP
The LCX112 is a dual J-K flip-flop. Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q# outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. LCX devices are designed for low voltage (3.3V or 2.5) operation with the added capability of interfacing to a 5V signal environment. The 74LCX112 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

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